Commit 7b888014 authored by Steven Toth's avatar Steven Toth Committed by Mauro Carvalho Chehab
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V4L/DVB (7007): cx23885: Add basic video support for the HVR1800



This enabled basic preview NTSC and PAL support for the HVR1800.

Signed-off-by: default avatarSteven Toth <stoth@hauppauge.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@infradead.org>
parent c7712613
cx23885-objs := cx23885-cards.o cx23885-core.o cx23885-i2c.o cx23885-dvb.o
cx23885-objs := cx23885-cards.o cx23885-video.o cx23885-vbi.o cx23885-core.o cx23885-i2c.o cx23885-dvb.o
obj-$(CONFIG_VIDEO_CX23885) += cx23885.o
......
......@@ -23,6 +23,7 @@
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <media/cx25840.h>
#include "cx23885.h"
......@@ -71,23 +72,29 @@ struct cx23885_board cx23885_boards[] = {
},
[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
.name = "Hauppauge WinTV-HVR1800",
.porta = CX23885_ANALOG_VIDEO,
.portc = CX23885_MPEG_DVB,
.tuner_type = TUNER_PHILIPS_TDA8290,
.tuner_addr = 0x42, /* 0x84 >> 1 */
.input = {{
.type = CX23885_VMUX_TELEVISION,
.vmux = 0,
.gpio0 = 0xff00,
},{
.type = CX23885_VMUX_DEBUG,
.vmux = 0,
.gpio0 = 0xff01,
.vmux = CX25840_VIN7_CH3 |
CX25840_VIN5_CH2 |
CX25840_VIN2_CH1,
.gpio0 = 0,
},{
.type = CX23885_VMUX_COMPOSITE1,
.vmux = 1,
.gpio0 = 0xff02,
.vmux = CX25840_VIN7_CH3 |
CX25840_VIN4_CH2 |
CX25840_VIN6_CH1,
.gpio0 = 0,
},{
.type = CX23885_VMUX_SVIDEO,
.vmux = 2,
.gpio0 = 0xff02,
.vmux = CX25840_VIN7_CH3 |
CX25840_VIN4_CH2 |
CX25840_VIN8_CH1 |
CX25840_SVIDEO_ON,
.gpio0 = 0,
}},
},
[CX23885_BOARD_HAUPPAUGE_HVR1250] = {
......
......@@ -50,7 +50,7 @@ MODULE_PARM_DESC(card,"card type");
static unsigned int cx23885_devcount;
static DEFINE_MUTEX(devlist);
static LIST_HEAD(cx23885_devlist);
LIST_HEAD(cx23885_devlist);
#define NO_SYNC_LINE (-1U)
......@@ -356,7 +356,7 @@ static int cx23885_risc_decode(u32 risc)
return incr[risc >> 28] ? incr[risc >> 28] : 1;
}
static void cx23885_wakeup(struct cx23885_tsport *port,
void cx23885_wakeup(struct cx23885_tsport *port,
struct cx23885_dmaqueue *q, u32 count)
{
struct cx23885_dev *dev = port->dev;
......@@ -392,7 +392,7 @@ static void cx23885_wakeup(struct cx23885_tsport *port,
__FUNCTION__, bc);
}
static int cx23885_sram_channel_setup(struct cx23885_dev *dev,
int cx23885_sram_channel_setup(struct cx23885_dev *dev,
struct sram_channel *ch,
unsigned int bpl, u32 risc)
{
......@@ -465,7 +465,7 @@ static int cx23885_sram_channel_setup(struct cx23885_dev *dev,
return 0;
}
static void cx23885_sram_channel_dump(struct cx23885_dev *dev,
void cx23885_sram_channel_dump(struct cx23885_dev *dev,
struct sram_channel *ch)
{
static char *name[] = {
......@@ -592,15 +592,18 @@ static void cx23885_reset(struct cx23885_dev *dev)
mdelay(100);
cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH01 ], 188*4, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH02 ], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH03 ], 188*4, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH04 ], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH05 ], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH06 ], 188*4, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH07 ], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH08 ], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH09 ], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH01],
720*4, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH02], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH03],
188*4, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH04], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH05], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH06],
188*4, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH07], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH08], 128, 0);
cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH09], 128, 0);
cx23885_gpio_setup(dev);
}
......@@ -634,7 +637,7 @@ static int get_resources(struct cx23885_dev *dev)
}
static void cx23885_timeout(unsigned long data);
static int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
u32 reg, u32 mask, u32 value);
static int cx23885_init_tsport(struct cx23885_dev *dev, struct cx23885_tsport *port, int portno)
......@@ -854,6 +857,17 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
cx23885_pci_quirks(dev);
/* Assume some sensible defaults */
dev->tuner_type = cx23885_boards[dev->board].tuner_type;
dev->tuner_addr = cx23885_boards[dev->board].tuner_addr;
dev->radio_type = cx23885_boards[dev->board].radio_type;
dev->radio_addr = cx23885_boards[dev->board].radio_addr;
dprintk(1, "%s() tuner_type = 0x%x tuner_addr = 0x%x\n",
__FUNCTION__, dev->tuner_type, dev->tuner_addr);
dprintk(1, "%s() radio_type = 0x%x radio_addr = 0x%x\n",
__FUNCTION__, dev->radio_type, dev->radio_addr);
/* init hardware */
cx23885_reset(dev);
......@@ -864,14 +878,21 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
cx23885_card_setup(dev);
cx23885_ir_init(dev);
if(cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) {
if (cx23885_boards[dev->board].porta == CX23885_ANALOG_VIDEO) {
if (cx23885_video_register(dev) < 0) {
printk(KERN_ERR "%s() Failed to register analog "
"video adapters on VID_A\n", __FUNCTION__);
}
}
if (cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) {
if (cx23885_dvb_register(&dev->ts1) < 0) {
printk(KERN_ERR "%s() Failed to register dvb adapters on VID_B\n",
__FUNCTION__);
}
}
if(cx23885_boards[dev->board].portc == CX23885_MPEG_DVB) {
if (cx23885_boards[dev->board].portc == CX23885_MPEG_DVB) {
if (cx23885_dvb_register(&dev->ts2) < 0) {
printk(KERN_ERR "%s() Failed to register dvb adapters on VID_C\n",
__FUNCTION__);
......@@ -891,6 +912,9 @@ static void cx23885_dev_unregister(struct cx23885_dev *dev)
if (!atomic_dec_and_test(&dev->refcount))
return;
if (cx23885_boards[dev->board].porta == CX23885_ANALOG_VIDEO)
cx23885_video_unregister(dev);
if(cx23885_boards[dev->board].portb == CX23885_MPEG_DVB)
cx23885_dvb_unregister(&dev->ts1);
......@@ -958,6 +982,45 @@ static u32* cx23885_risc_field(u32 *rp, struct scatterlist *sglist,
return rp;
}
int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
struct scatterlist *sglist, unsigned int top_offset,
unsigned int bottom_offset, unsigned int bpl,
unsigned int padding, unsigned int lines)
{
u32 instructions, fields;
u32 *rp;
int rc;
fields = 0;
if (UNSET != top_offset)
fields++;
if (UNSET != bottom_offset)
fields++;
/* estimate risc mem: worst case is one write per page border +
one write per scan line + syncs + jump (all 2 dwords). Padding
can cause next bpl to start close to a page border. First DMA
region may be smaller than PAGE_SIZE */
/* write and jump need and extra dword */
instructions = fields * (1 + ((bpl + padding) * lines) / PAGE_SIZE + lines);
instructions += 2;
if ((rc = btcx_riscmem_alloc(pci,risc,instructions*12)) < 0)
return rc;
/* write risc instructions */
rp = risc->cpu;
if (UNSET != top_offset)
rp = cx23885_risc_field(rp, sglist, top_offset, 0,
bpl, padding, lines);
if (UNSET != bottom_offset)
rp = cx23885_risc_field(rp, sglist, bottom_offset, 0x200,
bpl, padding, lines);
/* save pointer to jmp instruction address */
risc->jmp = rp;
BUG_ON((risc->jmp - risc->cpu + 2) * sizeof (*risc->cpu) > risc->size);
return 0;
}
static int cx23885_risc_databuffer(struct pci_dev *pci,
struct btcx_riscmem *risc,
......@@ -990,7 +1053,7 @@ static int cx23885_risc_databuffer(struct pci_dev *pci,
return 0;
}
static int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
u32 reg, u32 mask, u32 value)
{
u32 *rp;
......@@ -1023,6 +1086,57 @@ void cx23885_free_buffer(struct videobuf_queue *q, struct cx23885_buffer *buf)
buf->vb.state = VIDEOBUF_NEEDS_INIT;
}
static void cx23885_tsport_reg_dump(struct cx23885_tsport *port)
{
struct cx23885_dev *dev = port->dev;
dprintk(1, "%s() Register Dump\n", __FUNCTION__);
dprintk(1, "%s() DEV_CNTRL2 0x%08X\n", __FUNCTION__,
cx_read(DEV_CNTRL2));
dprintk(1, "%s() PCI_INT_MSK 0x%08X\n", __FUNCTION__,
cx_read(PCI_INT_MSK));
dprintk(1, "%s() AUD_INT_INT_MSK 0x%08X\n", __FUNCTION__,
cx_read(AUDIO_INT_INT_MSK));
dprintk(1, "%s() AUD_INT_DMA_CTL 0x%08X\n", __FUNCTION__,
cx_read(AUD_INT_DMA_CTL));
dprintk(1, "%s() AUD_EXT_INT_MSK 0x%08X\n", __FUNCTION__,
cx_read(AUDIO_EXT_INT_MSK));
dprintk(1, "%s() AUD_EXT_DMA_CTL 0x%08X\n", __FUNCTION__,
cx_read(AUD_EXT_DMA_CTL));
dprintk(1, "%s() PAD_CTRL 0x%08X\n", __FUNCTION__,
cx_read(PAD_CTRL));
dprintk(1, "%s() ALT_PIN_OUT_SEL 0x%08X\n", __FUNCTION__,
cx_read(ALT_PIN_OUT_SEL));
dprintk(1, "%s() GPIO2 0x%08X\n", __FUNCTION__,
cx_read(GPIO2));
dprintk(1, "%s() gpcnt(0x%08X) 0x%08X\n", __FUNCTION__,
port->reg_gpcnt, cx_read(port->reg_gpcnt));
dprintk(1, "%s() gpcnt_ctl(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_gpcnt_ctl, cx_read(port->reg_gpcnt_ctl));
dprintk(1, "%s() dma_ctl(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_dma_ctl, cx_read(port->reg_dma_ctl));
dprintk(1, "%s() src_sel(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_src_sel, cx_read(port->reg_src_sel));
dprintk(1, "%s() lngth(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_lngth, cx_read(port->reg_lngth));
dprintk(1, "%s() hw_sop_ctrl(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_hw_sop_ctrl, cx_read(port->reg_hw_sop_ctrl));
dprintk(1, "%s() gen_ctrl(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_gen_ctrl, cx_read(port->reg_gen_ctrl));
dprintk(1, "%s() bd_pkt_status(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_bd_pkt_status, cx_read(port->reg_bd_pkt_status));
dprintk(1, "%s() sop_status(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_sop_status, cx_read(port->reg_sop_status));
dprintk(1, "%s() fifo_ovfl_stat(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_fifo_ovfl_stat, cx_read(port->reg_fifo_ovfl_stat));
dprintk(1, "%s() vld_misc(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_vld_misc, cx_read(port->reg_vld_misc));
dprintk(1, "%s() ts_clk_en(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_ts_clk_en, cx_read(port->reg_ts_clk_en));
dprintk(1, "%s() ts_int_msk(0x%08X) 0x%08x\n", __FUNCTION__,
port->reg_ts_int_msk, cx_read(port->reg_ts_int_msk));
}
static int cx23885_start_dma(struct cx23885_tsport *port,
struct cx23885_dmaqueue *q,
struct cx23885_buffer *buf)
......@@ -1085,6 +1199,9 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
cx_set(DEV_CNTRL2, (1<<5)); /* Enable RISC controller */
if (debug > 4)
cx23885_tsport_reg_dump(port);
return 0;
}
......@@ -1100,7 +1217,7 @@ static int cx23885_stop_dma(struct cx23885_tsport *port)
return 0;
}
static int cx23885_restart_queue(struct cx23885_tsport *port,
int cx23885_restart_queue(struct cx23885_tsport *port,
struct cx23885_dmaqueue *q)
{
struct cx23885_dev *dev = port->dev;
......@@ -1324,12 +1441,15 @@ static irqreturn_t cx23885_irq(int irq, void *dev_id)
struct cx23885_tsport *ts1 = &dev->ts1;
struct cx23885_tsport *ts2 = &dev->ts2;
u32 pci_status, pci_mask;
u32 vida_status, vida_mask;
u32 ts1_status, ts1_mask;
u32 ts2_status, ts2_mask;
int ts1_count = 0, ts2_count = 0, handled = 0;
int vida_count = 0, ts1_count = 0, ts2_count = 0, handled = 0;
pci_status = cx_read(PCI_INT_STAT);
pci_mask = cx_read(PCI_INT_MSK);
vida_status = cx_read(VID_A_INT_STAT);
vida_mask = cx_read(VID_A_INT_MSK);
ts1_status = cx_read(VID_B_INT_STAT);
ts1_mask = cx_read(VID_B_INT_MSK);
ts2_status = cx_read(VID_C_INT_STAT);
......@@ -1338,11 +1458,17 @@ static irqreturn_t cx23885_irq(int irq, void *dev_id)
if ( (pci_status == 0) && (ts2_status == 0) && (ts1_status == 0) )
goto out;
vida_count = cx_read(VID_A_GPCNT);
ts1_count = cx_read(ts1->reg_gpcnt);
ts2_count = cx_read(ts2->reg_gpcnt);
dprintk(7, "pci_status: 0x%08x pci_mask: 0x%08x\n", pci_status, pci_mask );
dprintk(7, "ts1_status: 0x%08x ts1_mask: 0x%08x count: 0x%x\n", ts1_status, ts1_mask, ts1_count );
dprintk(7, "ts2_status: 0x%08x ts2_mask: 0x%08x count: 0x%x\n", ts2_status, ts2_mask, ts2_count );
dprintk(7, "pci_status: 0x%08x pci_mask: 0x%08x\n",
pci_status, pci_mask);
dprintk(7, "vida_status: 0x%08x vida_mask: 0x%08x count: 0x%x\n",
vida_status, vida_mask, vida_count);
dprintk(7, "ts1_status: 0x%08x ts1_mask: 0x%08x count: 0x%x\n",
ts1_status, ts1_mask, ts1_count);
dprintk(7, "ts2_status: 0x%08x ts2_mask: 0x%08x count: 0x%x\n",
ts2_status, ts2_mask, ts2_count);
if ( (pci_status & PCI_MSK_RISC_RD) ||
(pci_status & PCI_MSK_RISC_WR) ||
......@@ -1379,11 +1505,18 @@ static irqreturn_t cx23885_irq(int irq, void *dev_id)
}
if (ts1_status)
handled += cx23885_irq_ts(ts1, ts1_status);
if (ts1_status) {
if (cx23885_boards[dev->board].portb == CX23885_MPEG_DVB)
handled += cx23885_irq_ts(ts1, ts1_status);
}
if (ts2_status) {
if (cx23885_boards[dev->board].portc == CX23885_MPEG_DVB)
handled += cx23885_irq_ts(ts2, ts2_status);
}
if (ts2_status)
handled += cx23885_irq_ts(ts2, ts2_status);
if (vida_status)
handled += cx23885_video_irq(dev, vida_status);
if (handled)
cx_write(PCI_INT_STAT, pci_status);
......
......@@ -270,7 +270,9 @@ static int i2c_xfer(struct i2c_adapter *i2c_adap,
static int attach_inform(struct i2c_client *client)
{
struct cx23885_dev *dev = i2c_get_adapdata(client->adapter);
struct cx23885_i2c *bus = i2c_get_adapdata(client->adapter);
struct cx23885_dev *dev = bus->dev;
struct tuner_setup tun_setup;
dprintk(1, "%s i2c attach [addr=0x%x,client=%s]\n",
client->driver->driver.name, client->addr, client->name);
......@@ -278,6 +280,31 @@ static int attach_inform(struct i2c_client *client)
if (!client->driver->command)
return 0;
if (dev->tuner_type != UNSET) {
dprintk(1, "%s (tuner) i2c attach [addr=0x%x,client=%s]\n",
client->driver->driver.name, client->addr,
client->name);
if ((dev->tuner_addr == ADDR_UNSET) ||
(dev->tuner_addr == client->addr)) {
dprintk(1, "%s (tuner || addr UNSET)\n",
client->driver->driver.name);
dprintk(1, "%s i2c attach [addr=0x%x,client=%s]\n",
client->driver->driver.name,
client->addr, client->name);
tun_setup.mode_mask = T_ANALOG_TV;
tun_setup.type = dev->tuner_type;
tun_setup.addr = dev->tuner_addr;
client->driver->command(client, TUNER_SET_TYPE_ADDR,
&tun_setup);
}
}
return 0;
}
......@@ -316,6 +343,7 @@ static struct i2c_adapter cx23885_i2c_adap_template = {
.owner = THIS_MODULE,
.id = I2C_HW_B_CX23885,
.algo = &cx23885_i2c_algo_template,
.class = I2C_CLASS_TV_ANALOG,
.client_register = attach_inform,
.client_unregister = detach_inform,
};
......@@ -371,6 +399,7 @@ int cx23885_i2c_register(struct cx23885_i2c *bus)
bus->i2c_algo.data = bus;
bus->i2c_adap.algo_data = bus;
i2c_set_adapdata(&bus->i2c_adap, bus);
i2c_add_adapter(&bus->i2c_adap);
bus->i2c_client.adapter = &bus->i2c_adap;
......
......@@ -233,6 +233,17 @@ Channel manager Data Structure entry = 20 DWORD
#define VID_A_INT_SSTAT 0x0004002C
#define VID_B_INT_MSK 0x00040030
#define VID_B_MSK_BAD_PKT (1 << 20)
#define VID_B_MSK_VBI_OPC_ERR (1 << 17)
#define VID_B_MSK_OPC_ERR (1 << 16)
#define VID_B_MSK_VBI_SYNC (1 << 13)
#define VID_B_MSK_SYNC (1 << 12)
#define VID_B_MSK_VBI_OF (1 << 9)
#define VID_B_MSK_OF (1 << 8)
#define VID_B_MSK_VBI_RISCI2 (1 << 5)
#define VID_B_MSK_RISCI2 (1 << 4)
#define VID_B_MSK_VBI_RISCI1 (1 << 1)
#define VID_B_MSK_RISCI1 1
#define VID_B_INT_STAT 0x00040034
#define VID_B_INT_MSTAT 0x00040038
#define VID_B_INT_SSTAT 0x0004003C
......@@ -336,6 +347,7 @@ Channel manager Data Structure entry = 20 DWORD
/* GPIO (417 Microsoftcontroller) Output Enable, Low Active */
#define MC417_OEN 0x00110024
#define MC417_CTL 0x00110028
#define ALT_PIN_OUT_SEL 0x0011002C
#define CLK_DELAY 0x00110048
#define PAD_CTRL 0x0011004C
......
......@@ -44,6 +44,10 @@
/* Max number of inputs by card */
#define MAX_CX23885_INPUT 8
#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
#define RESOURCE_OVERLAY 1
#define RESOURCE_VIDEO 2
#define RESOURCE_VBI 4
#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
......@@ -56,6 +60,60 @@
#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
#define CX23885_BOARD_HAUPPAUGE_HVR1500 6
/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
#define CX23885_NORMS (\
V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
struct cx23885_fmt {
char *name;
u32 fourcc; /* v4l2 format id */
int depth;
int flags;
u32 cxformat;
};
struct cx23885_ctrl {
struct v4l2_queryctrl v;
u32 off;
u32 reg;
u32 mask;
u32 shift;
};
struct cx23885_tvnorm {
char *name;
v4l2_std_id id;
u32 cxiformat;
u32 cxoformat;
};
struct cx23885_fh {
struct cx23885_dev *dev;
enum v4l2_buf_type type;
int radio;
u32 resources;
/* video overlay */
struct v4l2_window win;
struct v4l2_clip *clips;
unsigned int nclips;
/* video capture */
struct cx23885_fmt *fmt;
unsigned int width, height;
/* vbi capture */
struct videobuf_queue vidq;
struct videobuf_queue vbiq;
/* MPEG Encoder specifics ONLY */
struct videobuf_queue mpegq;
atomic_t v4l_reading;
};
enum cx23885_itype {
CX23885_VMUX_COMPOSITE1 = 1,
CX23885_VMUX_COMPOSITE2,
......@@ -94,12 +152,17 @@ struct cx23885_input {
typedef enum {
CX23885_MPEG_UNDEFINED = 0,
CX23885_MPEG_DVB
CX23885_MPEG_DVB,
CX23885_ANALOG_VIDEO,
} port_t;
struct cx23885_board {
char *name;
port_t portb, portc;
port_t porta, portb, portc;
unsigned int tuner_type;
unsigned int radio_type;
unsigned char tuner_addr;
unsigned char radio_addr;
/* Vendors can and do run the PCIe bridge at different
* clock rates, driven physically by crystals on the PCBs.
......@@ -228,8 +291,31 @@ struct cx23885_dev {
CX23885_BRIDGE_885 = 885,
CX23885_BRIDGE_887 = 887,
} bridge;
/* Analog video */
u32 resources;
unsigned int input;
u32 tvaudio;
v4l2_std_id tvnorm;
unsigned int tuner_type;
unsigned char tuner_addr;
unsigned int radio_type;
unsigned char radio_addr;
unsigned int has_radio;
/* V4l */
u32 freq;
struct video_device *video_dev;
struct video_device *vbi_dev;
struct video_device *radio_dev;
struct cx23885_dmaqueue vidq;
struct cx23885_dmaqueue vbiq;
spinlock_t slock;
};
extern struct list_head cx23885_devlist;
#define SRAM_CH01 0 /* Video A */
#define SRAM_CH02 1 /* VBI A */
#define SRAM_CH03 2 /* Video B */
......@@ -273,8 +359,34 @@ struct sram_channel {
#define cx_clear(reg,bit) cx_andor((reg),(bit),0)
/* ----------------------------------------------------------- */
/* cx23885-cards.c */
/* cx23885-core.c */
extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
struct sram_channel *ch,
unsigned int bpl, u32 risc);
extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
struct sram_channel *ch);
extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
u32 reg, u32 mask, u32 value);
extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
struct scatterlist *sglist,
unsigned int top_offset, unsigned int bottom_offset,
unsigned int bpl, unsigned int padding, unsigned int lines);
void cx23885_cancel_buffers(struct cx23885_tsport *port);
extern int cx23885_restart_queue(struct cx23885_tsport *port,
struct cx23885_dmaqueue *q);
extern void cx23885_wakeup(struct cx23885_tsport *port,
struct cx23885_dmaqueue *q, u32 count);
/* ----------------------------------------------------------- */