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drm/i915: move gen6 rps handling to workqueue
The render P-state handling code requires reading from a GT register. This means that FORCEWAKE must be written to, a resource which is shared and should be protected by struct_mutex. Hence we can not manipulate that register from within the interrupt handling and so must delegate the task to a workqueue. Signed-off-by:Ben Widawsky <ben@bwidawsk.net> Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
Keith Packard <keithp@keithp.com>
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- drivers/gpu/drm/i915/i915_dma.c 1 addition, 0 deletionsdrivers/gpu/drm/i915/i915_dma.c
- drivers/gpu/drm/i915/i915_drv.h 4 additions, 0 deletionsdrivers/gpu/drm/i915/i915_drv.h
- drivers/gpu/drm/i915/i915_irq.c 41 additions, 8 deletionsdrivers/gpu/drm/i915/i915_irq.c
- drivers/gpu/drm/i915/i915_reg.h 4 additions, 1 deletiondrivers/gpu/drm/i915/i915_reg.h
- drivers/gpu/drm/i915/intel_display.c 8 additions, 0 deletionsdrivers/gpu/drm/i915/intel_display.c
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