This project is mirrored from https://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-stable-rt.git.
Pull mirroring updated .
- Oct 21, 2011
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Axel Lin authored
We have defined SGTL5000_LINREG_VDDD_MASK in sgtl5000.h, use it instead of hardcoded (0x1 << 4) - 1 for the mask. Signed-off-by:
Axel Lin <axel.lin@gmail.com> Acked-by:
Wolfram Sang <w.sang@pengutronix.de> Acked-by:
Liam Girdwood <lrg@ti.com> Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com>
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Axel Lin authored
Otherwise calling ldo_regulator_remove() does not unregister regulator and free memories. Signed-off-by:
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- Oct 20, 2011
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Axel Lin authored
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Axel Lin authored
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Axel Lin authored
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
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Axel Lin authored
According to the register map in datasheet, the registers are 8 bit. Signed-off-by:
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Axel Lin authored
According to the datasheet: BIT 2:1 VMID_SEL[1:0] VMID Divider Enable and Select 00 = VMID disabled 01 = 2x40k Omh divider 10 = 2x240k Omh divider 11 = 2x5k Omh divider To set VMID 2*240k, we should OR reg with 0x04 instead of 0x40. Signed-off-by:
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- Oct 19, 2011
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Axel Lin authored
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Ashish Chavan authored
This patch adds controls to set following ALC parameters, - Max gain, Min gain, Noise gain, Attack rate, Release rate and delay It also adds a switch to enable/disable noise suppression. As per DA7210 data sheet, ALC and noise suppression can be enabled only if certain conditions are met. This condition checks are handled by simply using "_EXT" version of controls to capture change events. Signed-off-by:
Ashish Chavan <ashish.chavan@kpitcummins.com> Signed-off-by:
David Dajun Chen <dchen@diasemi.com> Acked-by:
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Ashish Chavan authored
This patch adds support for below set of controls, (1) Mute controls for MIC, AUX and ADC (2) Zero cross controls for head phone, AUX, INPGA and line out (3) Head phone mode selection - class H or G It also adds digital_mute() call back. Signed-off-by:
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Axel Lin authored
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
Lars-Peter Clausen <lars@metafoo.de> Acked-by:
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Mark Brown authored
Not that we have interrupt handling in the driver at the minute. Signed-off-by:
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Axel Lin authored
According to the datasheet: CHIP_MIC_CTRL 0x002A BITS[9:8] BIAS_RESISTOR 0x0 = Powerd off 0x1 = 2.0 kohm 0x2 = 4.0 kohm 0x3 = 8.0 kohm To set mic bias resistor, we need to update bits[9:8] of SGTL5000_CHIP_MIC_CTRL register. Signed-off-by: -
Axel Lin authored
According to the datasheet: CHIP_MIC_CTRL 0x002A BITS[9:8] BIAS_RESISTOR 0x0 = Powerd off 0x1 = 2.0 kohm 0x2 = 4.0 kohm 0x3 = 8.0 kohm Thus SGTL5000_BIAS_R_MASK should be defined as 0x0300 instead of 0x0200. Signed-off-by: -
Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
Barry Song <21cnbao@gmail.com> Acked-by:
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- Oct 18, 2011
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Mark Brown authored
We don't want to clear the prefix while we're creating the DAPM controls for the device as the prefix is applied during control creation. Signed-off-by:
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Mark Brown authored
At least for the core controls, the optionally selected controls are still added programatically. Signed-off-by:
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Mark Brown authored
Evaluation of larger quantities of material has provided new DCS codes values to be applied for WM1811. Signed-off-by:
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- Oct 17, 2011
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
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Axel Lin authored
Now we have done bitwise NOT against the mask bits for the defines of WM8900_REG_CLOCKING1_BCLK_MASK, WM8900_REG_CLOCKING1_OPCLK_MASK and WM8900_LRC_MASK. But we don't have the bitwise NOT against the mask bits for the defines of WM8900_REG_CLOCKING2_DAC_CLKDIV, WM8900_REG_CLOCKING2_ADC_CLKDIV and WM8900_REG_DACCTRL_AIF_LRCLKRATE. It is error prone to mix the inconsistent meaning for different mask defines. So lets make the defines for each mask to be corresponding to the bits defines in datasheet. Don't add extra "bitwise NOT" to the defines. Signed-off-by:
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Axel Lin authored
After checking the datasheet, I think what we want to do here is to clear the WM8900_REG_CLOCKING2_DAC_CLKDIV/WM8900_REG_CLOCKING2_ADC_CLKDIV/ WM8900_REG_DACCTRL_AIF_LRCLKRATE bits and then OR with div value. Signed-off-by:
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Axel Lin authored
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Axel Lin authored
According to the datasheet: Format Control (05h) BITS[3:2] FMT[1:0] Audio data format selection 00 = right justified mode 01 = left justified mode 10 = I2S mode 11 = DSP mode BIT[4] LRP Polarity selec for LRCLK/DSP mode select 0 = normal LRCLK poalrity/DSP mode A 1 = inverted LRCLK poarity/DSP mode B For SND_SOC_DAIFMT_DSP_A, we should set 0x000C instead of 0x0003. For SND_SOC_DAIFMT_DSP_B, we should set 0x001C instead of 0x0013. Signed-off-by: -
Mark Brown authored
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Ashish Chavan authored
This patch add controls for setting cut-off for high pass and voice filters of ADC and DAC. There are also switches to enable/disable these filters. Also removed hard coded, fixed values of these parameters used by previous version of driver. Signed-off-by:
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Ashish Chavan authored
This patch adds support for ADC and DAC five band equalizers available on DA7210 codec. Signed-off-by:
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Olof Johansson authored
Fixes the following sparse warnings: sound/soc/tegra/tegra_das.c:215:8: warning: Using plain integer as NULL pointer sound/soc/tegra/tegra_das.c:237:8: warning: Using plain integer as NULL pointer sound/soc/tegra/tegra_pcm.c:370:32: warning: symbol 'tegra_pcm_platform' was not declared. Should it be static? Signed-off-by:
Olof Johansson <olof@lixom.net> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
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Lars-Peter Clausen authored
The MAINTAINERS entry for the ADI sound CODEC drivers currently only lists the ADI devices-drivers-devel mailing-list. Add myself as additional contact, since I'm the person at ADI who is currently doing most of the work on these drivers. Signed-off-by:
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- Oct 14, 2011
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Peter Ujfalusi authored
We need to have as less time between McPDM shutdown, and power down of the DAC on the twl6040 codec as possible. Request core to ignore the pmdown_time for the playback stream. Backround: with the McPDM protocol we are sendning not only the pure audio stream, but OMAP McPDM also transmits additional information (for example offset cancellation). If McPDM is stopped prior to the DAC this information will be not sent to the codec, which can result noise rendered by the twl6040 codec. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by:
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Peter Ujfalusi authored
With this flag codec drivers can indicate that it is desired to ignore the pmdown_time for DAPM shutdown sequence when playback stream is stopped. The DAPM sequence will be executed without delay in this case. Signed-off-by:
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Ashish Chavan authored
This patch takes care of reserved bits of headphone volume register by using correct volume range. Signed-off-by:
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Axel Lin authored
Current code defines AD193X_PLL_INPUT_MASK as (~0x6) which is quite different from other MASK defines. To make it consistent with other mask defines, define AD193X_PLL_INPUT_MASK as 0x6 and change the code accordingly. I think this change improves the readability. Signed-off-by:
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write This patch also includes a comment fix in wm8990_set_dai_pll(), if freq_in and freq_out are 0, what we do is to clear WM8990_PLL_ENA bit. Thus the comment should be "Turn off PLL". Signed-off-by:
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Axel Lin authored
If (fakepower & ((1 << WM8990_INMIXR_PWR_BIT) | (1 << WM8990_AINRMUX_PWR_BIT))) is false, we should clear WM8990_AINR_ENA bits instead of WM8990_AINL_ENA. Signed-off-by:
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Axel Lin authored
If (fakepower & ((1 << WM8400_INMIXR_PWR) | (1 << WM8400_AINRMUX_PWR))) is false, we should clear WM8400_AINR_ENA bits instead of WM8400_AINL_ENA. Signed-off-by:
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
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Axel Lin authored
If (fakepower & ((1 << WM8991_INMIXR_PWR_BIT)|(1 << WM8991_AINRMUX_PWR_BIT)))) is false, we should clear WM8991_AINR_ENA bits instead of WM8991_AINL_ENA. Signed-off-by:
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