This project is mirrored from https://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-stable-rt.git.
Pull mirroring updated .
- Oct 18, 2011
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Mark Brown authored
Evaluation of larger quantities of material has provided new DCS codes values to be applied for WM1811. Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by:
Liam Girdwood <lrg@ti.com>
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- Oct 17, 2011
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
Axel Lin <axel.lin@gmail.com> Signed-off-by:
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
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Axel Lin authored
Now we have done bitwise NOT against the mask bits for the defines of WM8900_REG_CLOCKING1_BCLK_MASK, WM8900_REG_CLOCKING1_OPCLK_MASK and WM8900_LRC_MASK. But we don't have the bitwise NOT against the mask bits for the defines of WM8900_REG_CLOCKING2_DAC_CLKDIV, WM8900_REG_CLOCKING2_ADC_CLKDIV and WM8900_REG_DACCTRL_AIF_LRCLKRATE. It is error prone to mix the inconsistent meaning for different mask defines. So lets make the defines for each mask to be corresponding to the bits defines in datasheet. Don't add extra "bitwise NOT" to the defines. Signed-off-by:
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Axel Lin authored
After checking the datasheet, I think what we want to do here is to clear the WM8900_REG_CLOCKING2_DAC_CLKDIV/WM8900_REG_CLOCKING2_ADC_CLKDIV/ WM8900_REG_DACCTRL_AIF_LRCLKRATE bits and then OR with div value. Signed-off-by:
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Axel Lin authored
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Axel Lin authored
According to the datasheet: Format Control (05h) BITS[3:2] FMT[1:0] Audio data format selection 00 = right justified mode 01 = left justified mode 10 = I2S mode 11 = DSP mode BIT[4] LRP Polarity selec for LRCLK/DSP mode select 0 = normal LRCLK poalrity/DSP mode A 1 = inverted LRCLK poarity/DSP mode B For SND_SOC_DAIFMT_DSP_A, we should set 0x000C instead of 0x0003. For SND_SOC_DAIFMT_DSP_B, we should set 0x001C instead of 0x0013. Signed-off-by: -
Mark Brown authored
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Ashish Chavan authored
This patch add controls for setting cut-off for high pass and voice filters of ADC and DAC. There are also switches to enable/disable these filters. Also removed hard coded, fixed values of these parameters used by previous version of driver. Signed-off-by:
Ashish Chavan <ashish.chavan@kpitcummins.com> Signed-off-by:
David Dajun Chen <dchen@diasemi.com> Signed-off-by:
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Ashish Chavan authored
This patch adds support for ADC and DAC five band equalizers available on DA7210 codec. Signed-off-by:
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Olof Johansson authored
Fixes the following sparse warnings: sound/soc/tegra/tegra_das.c:215:8: warning: Using plain integer as NULL pointer sound/soc/tegra/tegra_das.c:237:8: warning: Using plain integer as NULL pointer sound/soc/tegra/tegra_pcm.c:370:32: warning: symbol 'tegra_pcm_platform' was not declared. Should it be static? Signed-off-by:
Olof Johansson <olof@lixom.net> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
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Lars-Peter Clausen authored
The MAINTAINERS entry for the ADI sound CODEC drivers currently only lists the ADI devices-drivers-devel mailing-list. Add myself as additional contact, since I'm the person at ADI who is currently doing most of the work on these drivers. Signed-off-by:
Lars-Peter Clausen <lars@metafoo.de> Signed-off-by:
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- Oct 14, 2011
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Peter Ujfalusi authored
We need to have as less time between McPDM shutdown, and power down of the DAC on the twl6040 codec as possible. Request core to ignore the pmdown_time for the playback stream. Backround: with the McPDM protocol we are sendning not only the pure audio stream, but OMAP McPDM also transmits additional information (for example offset cancellation). If McPDM is stopped prior to the DAC this information will be not sent to the codec, which can result noise rendered by the twl6040 codec. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by:
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Peter Ujfalusi authored
With this flag codec drivers can indicate that it is desired to ignore the pmdown_time for DAPM shutdown sequence when playback stream is stopped. The DAPM sequence will be executed without delay in this case. Signed-off-by:
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Ashish Chavan authored
This patch takes care of reserved bits of headphone volume register by using correct volume range. Signed-off-by:
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Axel Lin authored
Current code defines AD193X_PLL_INPUT_MASK as (~0x6) which is quite different from other MASK defines. To make it consistent with other mask defines, define AD193X_PLL_INPUT_MASK as 0x6 and change the code accordingly. I think this change improves the readability. Signed-off-by:
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write This patch also includes a comment fix in wm8990_set_dai_pll(), if freq_in and freq_out are 0, what we do is to clear WM8990_PLL_ENA bit. Thus the comment should be "Turn off PLL". Signed-off-by:
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Axel Lin authored
If (fakepower & ((1 << WM8990_INMIXR_PWR_BIT) | (1 << WM8990_AINRMUX_PWR_BIT))) is false, we should clear WM8990_AINR_ENA bits instead of WM8990_AINL_ENA. Signed-off-by:
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Axel Lin authored
If (fakepower & ((1 << WM8400_INMIXR_PWR) | (1 << WM8400_AINRMUX_PWR))) is false, we should clear WM8400_AINR_ENA bits instead of WM8400_AINL_ENA. Signed-off-by:
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
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Axel Lin authored
If (fakepower & ((1 << WM8991_INMIXR_PWR_BIT)|(1 << WM8991_AINRMUX_PWR_BIT)))) is false, we should clear WM8991_AINR_ENA bits instead of WM8991_AINL_ENA. Signed-off-by:
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Axel Lin authored
codec->hw_read is broken now, let's covert to snd_soc_read. Signed-off-by:
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Axel Lin authored
codec->hw_read is broken now, let's covert to snd_soc_read. Signed-off-by:
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Axel Lin authored
codec->hw_read is broken now, let's covert to snd_soc_read. Signed-off-by:
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Axel Lin authored
Signed-off-by:
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Mark Brown authored
Signed-off-by:
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- Oct 13, 2011
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write. Signed-off-by:
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Peter Ujfalusi authored
Since the event handler is only used by the Earphone Driver, it is better to rename it from twl6040_power_mode_event to twl6040_ep_drv_event. Signed-off-by:
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Peter Ujfalusi authored
It is better to switch HS Power Mode (if it was in low power mode) before we enable the Earpiece driver. The switched off EP driver can filter out noise coming from the Low Power to High Performance transition on the HSL DAC. Signed-off-by:
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Peter Ujfalusi authored
There is no limitation dictated by outputs or inputs regarding to the selected PLL (LP/HP). Remove the checks for this, and allow all path with any PLL configuration. Signed-off-by:
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Peter Ujfalusi authored
Capture is supported in all PLL configuration. Signed-off-by:
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Mark Brown authored
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Axel Lin authored
ak4535_reg should be 8bit, but cache table is defined as 16bit. Signed-off-by:
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Kuninori Morimoto authored
ak4642 register was 8bit, but cache table was defined as 16bit. ak4642 doesn't work correctry without this patch. Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
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Axel Lin authored
Chip documentation explicitly requires that the reset values of reserved register bits are left untouched. codec->hw_read is broken now. Here we use below trick to avoid writing to reserved registers while resume. Write the register default value to cache for reserved registers, so the write to the these registers are suppressed by the cache restore code when it skips writes of default registers. Signed-off-by:
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Axel Lin authored
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Axel Lin authored
The core will sync DAPM as part of the card initialization, there is no need for machine drivers to do so during their setup. Signed-off-by:
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- Oct 12, 2011
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Axel Lin authored
In saarb_pm860x_init() and evb3_pm860x_init(), we call pm860x_hs_jack_detect() and pm860x_mic_jack_detect() which in turn calls pm860x_set_bits(). Thus make SND_SOC_SAARB and SND_SOC_TAVOREVB3 select MFD_88PM860X. This patch fixes below build error if CONFIG_MFD_88PM860X is not configured. LD .tmp_vmlinux1 sound/built-in.o: In function `pm860x_write_reg_cache': last.c:(.text+0x29e9c): undefined reference to `pm860x_reg_write' sound/built-in.o: In function `pm860x_set_bias_level': last.c:(.text+0x29ecc): undefined reference to `pm860x_set_bits' last.c:(.text+0x29f00): undefined reference to `pm860x_reg_write' last.c:(.text+0x29f18): undefined reference to `pm860x_reg_write' sound/built-in.o: In function `pm860x_read_reg_cache': last.c:(.text+0x29f40): undefined reference to `pm860x_reg_read' sound/built-in.o: In function `pm860x_probe': last.c:(.text+0x2a034): undefined reference to `pm860x_bulk_read' sound/built-in.o: In function `pm860x_codec_handler': last.c:(.text+0x2a344): undefined reference to `pm860x_reg_read' last.c:(.text+0x2a354): undefined reference to `pm860x_reg_read' sound/built-in.o: In function `pm860x_mic_jack_detect': last.c:(.text+0x2a450): undefined reference to `pm860x_set_bits' sound/built-in.o: In function `pm860x_hs_jack_detect': last.c:(.text+0x2a4d0): undefined reference to `pm860x_set_bits' last.c:(.text+0x2a4f8): undefined reference to `pm860x_set_bits' last.c:(.text+0x2a510): undefined reference to `pm860x_set_bits' make: *** [.tmp_vmlinux1] Error 1 Signed-off-by:
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Ashish Chavan authored
This patchs adds support for following, (1) DAI 20 and 32 bit word sizes (2) DAI left and right justified formats (3) DAI slave mode Signed-off-by:
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Peter Ujfalusi authored
Both Headset DAC need to be turned on/off at the same time before any of the output drivers are enabled (HS Left/Right, Earpiece). Move the HS DAC enable code to sequenced DAPM_SUPPLY, and attach it to the DACs. Signed-off-by:
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