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This project is mirrored from https://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-stable-rt.git. Pull mirroring updated .
  1. Jun 11, 2006
  2. Jun 10, 2006
    • David S. Miller's avatar
      [SPARC64]: Avoid JBUS errors on some Niagara systems. · 46b30493
      David S. Miller authored
      
      Doing PCI config space accesses to non-present PCI slots
      can result in fatal JBUS errors if the PCI config access
      hypervisor call is performed on cpus other than the boot
      cpu.
      
      PCI config space accesses to present PCI slots works just
      fine.
      
      Recursively traverse the OBP device tree under the PCI
      controller node and record all present device IDs into
      a small hash table.
      
      Avoid the hypervisor call for any PCI config space access
      attempt for a device not recorded in the hash table.
      
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      46b30493
  3. Jun 09, 2006
  4. Jun 08, 2006
  5. Jun 05, 2006
  6. Jun 04, 2006
  7. Jun 02, 2006
    • Lennert Buytenhek's avatar
      [ARM] 3540/1: ixp23xx: deal with gap in interrupt bitmasks · ec8510f6
      Lennert Buytenhek authored
      
      Patch from Lennert Buytenhek
      
      On the ixp23xx, the microengine thread interrupt sources are numbered
      56..119, but their mask/status bits are located in bit positions 64..127
      in the various registers in the interrupt controller (bit positions
      56..63 are unused.)
      
      We don't deal with this, so currently, when asked to enable IRQ 64, we
      will enable IRQ 56 instead.
      
      The only interrupts >= 64 are the thread interrupt sources, and there
      are no in-tree users of those yet, so this is fortunately not a big
      problem, but this needs fixing anyway.
      
      Signed-off-by: default avatarLennert Buytenhek <buytenh@wantstofly.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      ec8510f6
  8. May 31, 2006
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